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Interprocedural Analysis for Parallelization

Mary W. Hall,
Brian R. Murphy, Saman P. Amarasinghe,
Shih-Wei Liao, Monica S. Lam

This research was supported in part by DARPA contracts N00039-91-C-0138 and DABT63-91-K-0003, the NASA HPCC program, an NSF Young Investigator Award, an NSF CISE postdoctoral fellowship, a fellowship from Intel Corporation, and a fellowship from AT&T Bell Laboratories.


This paper presents an extensive empirical evaluation of an interprocedural parallelizing compiler, developed as part of the Stanford SUIF compiler system. The system incorporates a comprehensive and integrated collection of analyses, including privatization and reduction recognition for both array and scalar variables, and symbolic analysis of array subscripts. The interprocedural analysis framework is designed to provide analysis results nearly as precise as full inlining but without its associated costs. Experimentation with this system on programs from standard benchmark suites demonstrate that an integrated combination of interprocedural analyses can substantially advance the capability of automatic parallelization technology.

Saman Amarasinghe
Mon Oct 2 11:00:22 PDT 1995