Team: Andrew Duncan, Urs Hoelzle, and Martin Rinard

Contact Address: aduncan@cs.ucsb.edu

Affiliation Name: U.C. Santa Barbara

Project Name: OSUIF

Size (number of people): 6

Keywords: Extension to basesuif

Descriptions of Project:

Studying how to add support for classes, inheritance, dynamic dispatch, and exceptions to SUIF.

Team: Manoj Plakal, and James Larus

Contact Address: plakal@cs.wisc.edu

Affiliation Name: Computer Sciences Dept, University of Wisconsin-Madison

Project Name: Individual research (summer RAship)

Size (number of people): 1

Keywords: Parallelization

Descriptions of Project:

Aim: To set up a framework for a parallelizing compiler that targets the Tempest parallel programming interface (developed by the Wisconsin Wind Tunnel, http://www.cs.wisc.edu/~wwt) and fine-grained Distributed Shared Memory systems in general. Job currently in progress: porting SUIF to target Tempest, Future work: adding SUIF passes to implement fine-grained DSM-specific optimizations, especially targetted for running on an SMP-like architecture.

Team: Omri Traub

Contact Address: otraub@eecs.harvard.edu

Affiliation Name: Harvard University

Project Name: Register Allocation

Size (number of people): 2

Keywords: Code Generation

Descriptions of Project:

Implementing different register allocation algorithms for a comparative study.

Team: Charles 'Buck' Krasic, Calton Pu, Jonathon Walpole, Andrew Black, and Charles Consel

Contact Address: krasic@cse.ogi.edu

Affiliation Name: Oregon Graduate Institute of Science & Technology

Project Name: Synthetix

Size (number of people): 8

Keywords: Front End

Descriptions of Project:

http://www.cse.ogi.edu/DISC/projects/synthetix.

Team: Morteza Biglari-Abhari, Prof. K. Eshraghian, and Mr. M. J. Liebelt

Contact Address: morteza@eleceng.adelaide.edu.au

Affiliation Name: Dept. of Elec. Eng., Univ. of Adelaide

Project:

Size (number of people): 1 (at present)

Keywords: Front End

Descriptions of Project:

Currently, I am working on a VLIW compiler. I use both SUIF and machsuif libraries to implement a VLIW compiler as quick as possible.

Team: Des Watson, Sam Type, Thalaya Alfuwzan, and Andrew Stevens

Contact Address: desw@cogs.susx.ac.uk

Affiliation Name: University of Sussex

Project Name: various

Size (number of people): 4

Keywords: Code Generation, Parallelization, Digital signal processing

Descriptions of Project:

Several projects are current:

• C++ optimization
• Java parallelization
• Code generator generator tools
• Code generation for microcontrollers

Team: Clifford Liem, Philippe Guillaume, and Ahmed Jerraya

Contact Address: liem@verdon.imag.fr

Affiliation Name: INPG (Institut National Polytechnique de Grenoble)

Project Name: TIMA code generation

Size (number of people): 2 to 3

Keywords: Code Generation, Digital Signal Processing, Embedded Processors

Descriptions of Project:

Exploration of advanced techniques for compilation to embedded processors.

Team: Mike Smith

Contact Address: smith@eecs.harvard.edu

Affiliation Name: Harvard University

Project Name: Machine SUIF

Size (number of people): 8

Keywords: Profile-Driven, Machine-Specific Optimization

Team: Somnath Ghosh, Prof. Margaret Martonosi, and Prof. Sharad Malik

Contact Address: sghosh@ee.princeton.edu

Affiliation Name: Princeton University

Project Name: A compiler framework for analyzing and tuning memory performance

Size (number of people): 3

Keywords: Analyzing and tuning memory performance.

Descriptions of Project:

We are trying to build a framework that will help us to guide better memory optimizations. We generate a set constraints on the cache behavior of scientific loops. These give us a precise characterization of the cache misses and would help us to modify loops for better cache performance

Team: Gary Tyson

Contact Address: tyson@eecs.umich.edu

Affiliation Name: University of Michigan

Project:

Keywords: Scalar Optimization, Code Generation

Descriptions of Project:

I have used SimpleSUIF in a graduate code optimization course at UC Riverside in Fall '96 and will be using it at UofM Fall '97. Each course studies scalar optimizations and the interaction between code optimization and computer architecture. SUIF/machSUIF will be used in conjunction with SimpleScalar (developed at Univ Wisc) to provide a platform for studying compilation issues for different processor implementations. I will also be using a graphical interface to SimpleSUIF (developed at UC Riverside) to allow interactive course lectures for various transformation.

Team: Brent Chun

Contact Address: bnc@cs.berkeley.edu

Affiliation Name: UC Berkeley Computer Science Division

Project Name: Application Tracing for Functional Unit Specialization

Size (number of people): 1

Keywords: Tracing

Descriptions of Project:

Using SUIF to instrument applications with tracing instructions to track variable bit-usage in order to assess opportunities for functional unit specialization using reconfigurable logic.

Team: Jeong-Min Kim

Contact Address: jeemee@sdgroup.snu.ac.kr

Affiliation Name: Seoul National University SoEE SDGroup

Project Name: Development of Multimedia Processor

Size (number of people): 2

Keywords: Code Generation, Digital Signal Processing

Team: Stephane Popinet, and Sylvain Giroudon

Contact Address: popinet@lmm.jussieu.fr

Project Name: OPERA

Size (number of people): 2

Keywords: Software Engineering

Descriptions of Project:

Development of a coarse grain prefetching for codes working with dense matrices. Development of the associated hardware based on DSP chips (see http://www.asci.fr/opera/opera.html).

Team: Sandrine Blazy

Contact Address: blazy@iie.cnam.fr

Affiliation Name: IIE-CNAM

Project Name: SFAC

Size (number of people): 2

Keywords: Software Engineering

Team: James Fenwick, and Lori Pollock

Contact Address: fenwick@cis.udel.edu

Affiliation Name: University of Delaware

Project Name: Optimizing Linda compiler

Size (number of people): 1

Keywords: Front End, Scalar Optimization, Communication Optimizations

Descriptions of Project:

My SUIF-based compiler accepts a Linda parallel program as input (requiring snoot enhancements to recognize/accept Linda syntax), performs Linda-specific analysis (tuplespace partitioning), new analyses targeting improved tuplespace communications, and mapping of tuplespace operations to a runtime library. The s2c module is used to generate code natively compiled with the runtime library.

Team: Chau-Wen Tseng

Contact Address: tseng@cs.umd.edu

Affiliation Name: University of Maryland, College Park

Project Name: COSMIC

Size (number of people): 2

Keywords: Scalar Optimization, Parallelization

Descriptions of Project:

The COSMIC project at the University of Maryland attempts to bridge the gap between applications, operating systems, and advanced architectures with compiler analysis and optimization. We are evaluating our ideas using an extension to the Stanford SUIF compiler infrastructure. Current projects include compiling for software DSMs, clusterd shared-memory multiprocessors, and data layout optimizations for high-performance architectures.

Team: Michael Hopper, Dr. D. Scott Wills, and Dr. Bill Appelbe

Contact Address: mhopper@ece.gatech.edu

Affiliation Name: Georgia Institute of Technology

Project Name: PicaCC

Size (number of people): 3

Keywords: Code Generation, Parallelization, Digital Signal Processing

Descriptions of Project:

The objective of the PicaCC compiler is to generate parallel multithreaded code from well structured DSP programs written in the C language. The resulting code consists of threads containing message send instructions and data synchronization. This research emphasizes the search for optimal thread size to balance parallel execution with parallel overhead costs. More information can be found at http://www.ee.gatech.edu/research/pica/compiler/picacc.htm

Team: Renaud Marlet, Charles Consel, and Gilles Muller

Contact Address: marlet@irisa.fr

Affiliation Name: IRISA/INRIA

Project Name: COMPOSE

Size (number of people): 13

Keywords: Partial Evaluation

Descriptions of Project:

The COMPOSE group is interested in the "Design and Development of Adaptive Programs and Systems". It focuses on "partial evaluation", a program transformation approach aimed at specializing programs with respect to invariants. Visit http://www.irisa.fr/compose for details.

We develop a partial evaluator for C programs, named Tempo. We use SUIF as a C front-end for parsing and typing. Analysis and generation of specialized code is mainly done in SML, with some C. We also use porky to do some post-processing on the specialized code.

Team: Gert Markwardt

Contact Address: gert.markwardt@sietec.de

Affiliation Name: Dresden University of Technology

Project Name: PREFIX (PhD Thesis)

Size (number of people): 1

Keywords: Code Generation

Descriptions of Project:

Code generator for a RISC processor with result forwarding extention

Team: Peter Graham, and Qing Chen

Contact Address: pgraham@cs.umanitoba.ca

Affiliation Name: Dept. of Computer Science, University of Manitoba

Project Name: Applying Partial Evaluation to Minimize Invocation Serialization in Multithreaded

Size (number of people): 3

Keywords: Code Generation, Parallelization

Descriptions of Project:

The idea behind this project is to apply dataflow and later dependence analysis to eliminate the need to serialize execution during subroutine invocation and return. Effectively, we determine the threads producing arguments for a given subroutine call and the threads processing the corresponding parameters within the subroutine. The function is then, in a sense, partially evaluated in parallel by the internal threads (up to synchronization points). Threads in the caller need not be synchronized at the call point and thus some calling threads may execute in parallel with the called threads. We plan on using SUIF to extract the needed information from C code to show that the proposed parallelizing transform will or will not be of benefit in multi-threaded machines. Initially, we will consider only scalar parameters (or array parameters which are treated as being indivisable).

Team: Jeremy Brown, and Tim Olsen

Contact Address: jhbrown@ai.mit.edu

Affiliation Name: MIT

Project Name: profile-based optimization

Size (number of people): 2

Keywords: Scalar Optimization

Descriptions of Project:

We're interested in looking at profile-based optimization applied over a program's operating lifetime, as opposed to the one-shot profile/optimization schemes currently used by high-end compilers.

Team: Ping Huang

Contact Address: pshuang@MIT.EDU

Affiliation Name: Massachusetts Institute of Technology

Project Name: Transit Reinventing Computing

Keywords: Scalar Optimization, Code Generation

Descriptions of Project:

Wrote thesis using SUIF as building block: Selecting better-performing alternative code using run-time profiling feedback.

Team: David Engebretsen, Matthew O'Keefe, and Peter Bergner

Contact Address: engebret@ee.umn.edu

Affiliation Name: University of Minnesota

Project Name: CRegs Architecture Research

Size (number of people): 3

Keywords: Scalar Optimization, Code Generation, Alias Analysis in Intermediate Stages

Descriptions of Project:

We are studying the efficacy of CRegs as a register file to support alias detection at run-time with some compiler support. We have used SUIF to implement our CReg register allocation algorithm and code generation strategy. We also used Robert Wilson's alias analysis code as part of our work.

Team: Jennifer Anderson, and Shun-Tak Leung

Contact Address: jennifer@pa.dec.com

Affiliation Name: Digital Equipment Corp

Project Name: Continuous Profiling and Optimization

Size (number of people): 8

Keywords: Scalar Optimization

Descriptions of Project:

We are looking at using SUIF to perform profile-guided optimizations, such as scheduling, prefetching and code placement.

Team: Matthew Frank, Saman Amarasinghe, and Anant Agarwal

Contact Address: mfrank@lcs.mit.edu

Affiliation Name: MIT-LCS

Project Name: RAW

Size (number of people): 10

Keywords: Code Generation, Parallelization

Descriptions of Project:

RAW is a highly parallel, scalable, VLSI architecture that fully exposes the low levels of the hardware architecture to the compiler. We are using SUIF to parallelize and schedule programs on the RAW machine.

Team: Corinna Lee

Contact Address: corinna@eecg.toronto.edu

Affiliation Name: Department of Electrical and Computer Engineering, University of Toronto

Project Name: A Vectorizing Compiler

Size (number of people): 3

Keywords: Code Generation, Parallelization, Digital Signal Processing

Descriptions of Project:

We have augmented the SUIF compiler with a vectorizing pass which is target-independent and a vector code generator that targets a MIPS-based vector processor. The bulk of the work is in the vectorizing pass and because it is target-independent, retargeting the vectorizing compiler should be a relatively simple task. Moreover, any enhancements to the vectorizing pass to improve code quality or to increase its applicability should result in increased performance in any targeted architecture with minimal change in the code generator.

Team: Bradley Kuszmaul

Contact Address: bradley@cs.yale.edu

Affiliation Name: Yale University

Project Name: Using Critical-Path Length as a Practical Performance Metric

Size (number of people): 3

Keywords: Computer Architecture

Descriptions of Project:

We compile SUIF into a dataflow graph, and then execute the program to find its critical-path length and average parallelism.

Team: Amit Rao, and Santosh Pande

Contact Address: arao@ececs.uc.edu

Affiliation Name: University of Cincinnati

Project Name: Unified Data and Code Partitioning

Size (number of people): 2

Keywords: Parallelization, Tiling

Descriptions of Project:

To obtain an optimal permutation of tasks within a tile in order to minimize overall completion time of loops on parallel architectures.

Team: Allan Rae, and Sridevan Parameswaran

Contact Address: rae@elec.uq.edu.au

Affiliation Name: Dept. of Electrical and Computer Engineering, University of Queensland

Project Name: Program Analysis

Size (number of people): 1-2

Keywords: Front End

Descriptions of Project:

This project aims to use SUIF to characterise an application. These program characteristics will then be used in performance prediction.

Team: Vipin Chaudhary Contact Address: vipin@eng.wayne.edu

Affiliation Name: Wayne State University

Project Name: APE: Automatic Parallelization Environment

Size (number of people): 12

Keywords: Front End, Parallelization

Descriptions of Project:

www.pdcl.eng.wayne.edu/APE.html

Team: Lori Pollock

Contact Address: pollock@cis.udel.edu

Affiliation Name: University of Delaware

Project Name: TUnable Compiler Optimization

Size (number of people): 3

Keywords: Scalar Optimization, Code Generation, Parallelization

Descriptions of Project:

We are investigating the monitoring of optimization effects during the optimization process and use of this information during the optimization decision making process, to deal with optimization interactions.

Team: Lori Pollock

Contact Address: pollock@cis.udel.edu

Affiliation Name: University of Delaware

Project Name: Automatic Test Case Generation for Parallel Programs

Size (number of people): 3

Keywords: Software Engineering

Descriptions of Project:

We are using suif to do the front end work for us, and for the infrastructure in performing program analysis. We are adding phases to perform program analysis of shared memory parallel programs in order to automatically provide test cases that cover du-pairs in a program.

Team: Lori Pollock

Contact Address: pollock@cis.udel.edu

Affiliation Name: University of Delaware

Project Name: Compiler optimization of Linda Programs

Size (number of people): 2

Keywords: Optimization of Parallel Programs

Descriptions of Project:

We are developing compiler optimization techniques for Linda parallel programs. We have extended the SUIF front end to take Linda programs as input, and then have added various phases for optimization analysis and transformation.

Team: Venkat Konda, Mike Lipsie, and Kei Sakamoto

Contact Address: vkonda@vsisinc.com

Affiliation Name: VSIS Inc, A Mitsubishi Electric Start-up.

Project Name: VLIW Compiler for M32R ERAM Processor

Size (number of people): 3-4

Keywords: Scalar Optimization, Code Generation, Digital Signal Processing, Embedded RAM (ERAM) Processor

Descriptions of Project:

Exploration of Compiler Optimizations and VLIW Technics in M32R Processor. M32R is world's first ERAM processor. The current product has 2 MByte on-chip DRAM.

Team: Sumith Mathew, Sandeep Gupta, and Eric Dahlman

Contact Address: mathew@cs.colostate.edu

Affiliation Name: Colorado State University

Project Name: Metrics-Guided Optimization of OO programs

Size (number of people): 3

Keywords: Front End, Scalar Optimization, Software Engineering, Code Generation

Descriptions of Project:

We are testing the effectiveness of metrics-guided optimizations on OO programs. As a first step we are testing this approach on Java programs. We are developing a Java-SUIF front-end for this purpose.

Team: John Platten

Contact Address: jplatten@caiwireless.net

Affiliation Name: Xerox/Kodak

Project Name: Code Restructuring/Porting

Size (number of people): 1

Keywords: Software Engineering, Code Generation, Code Restructuring/Porting

Descriptions of Project:

To use SUIF primarily as a vehicle for automating the conversion, translation, restructuring, quality improvement, (other) of legacy based on C source code (possibly C++ in the future).

Team: Adam Downing

Contact Address: adamd@pinehurst.net

World Wide Web Address: home.pinehurst.net/regiment/adam

Project

Keywords: Software Engineering

Last updated by Amy Lim on Tue Sep 2 17:28:36 PDT 1997.