[CS343] DSP design is stuck in the past

[Paul Hartke]

[Some themes we have discussed this term...  -pmh]

DSP design is stuck in the past
By Jeff Bier, EE Times
May 27, 2003 (9:22 a.m. EST)
URL: http://www.eetimes.com/story/OEG20030522S0022 

In his keynote address at last month's International Signal Processing 
Conference, Alan Oppenheim, Ford professor of electrical engineering at 
MIT, talked about how traditional signal-processing methods can clash 
with advances in computing hardware. Oppenheim compared two approaches 
to implementing the discrete Fourier transform. Most DSP engineers 
assume that the usual approach, the fast Fourier transform, is always 
the most efficient. Oppenheim explained, however, that the FFT is less 
efficient than other approaches on some important classes of processors.

Oppenheim pointed to a growing problem in DSP: outdated assumptions 
that lead engineers to pursue the wrong goals. For example, the FFT is 
designed for systems where computational resources are the main 
performance bottleneck, but in some modern systems, communications 
resources are the real logjam.

Those same outdated assumptions are afflicting processor design. To a 
large extent, DSP processor design is driven by the historical expense 
of key processor resources-and not by a search for optimal processing 
methods. In the first generation of DSPs, computational units were 
expensive; the multiplier unit alone occupied a quarter of the die 
area. As a result, computational units have been treated like royalty. 
Traditional processor designs surround a handful of computational units 
with legions of subservient registers, buses and other supporting 
hardware.

But this design involves a huge amount of indirection. To complete a 
multiplication, for example, the processor must load an instruction, 
decode it, compute the operand addresses, move the operands from memory 
into registers . . . and then finally do the multiply. Storing the 
result requires nearly as many steps.

Today, computational units are cheap and take up a minute portion of a 
processor's real estate. Not surprisingly, modern DSPs contain far more 
computational units than yesterday's chips. Yet DSP processors still 
coddle the computational units in a vast sea of supporting hardware. 
This supporting hardware now stands in the way of efficiency. For 
example, DSPs could be more energy efficient if they didn't spend so 
much juice shuffling data back and forth between memory, registers and 
computational units.

For general-purpose, noncomputationally-intensive tasks, it may still 
make sense to treat a computational unit like a king. But for DSP 
applications, it may be time to consider different approaches. Indeed, 
Berkeley Design expects nontraditional architectures like FPGAs to 
become increasingly common in signal-processing applications.

Jeff Bier is the general manager of Berkeley Design Technology Inc. ( 
www.BDTI.com), the DSP technology analysis and software development 
company. Kenton Williston of BDTI contributed to this column.