Monica S. Lam

Address:  Room 307, Gates Computer Science Building
                Stanford, CA 94305-3070
Tel:          (650) 725-3714
Fax:         (650) 725-6949
Email:      lam at cs.stanford.edu
WWW:   http://cs.stanford.edu/~lam

Education

• Ph.D. Computer Science, Carnegie Mellon University, 1987.
• M.S. Computer Science, Carnegie Mellon University, 1982.
• B.S. Computer Science, University of British Columbia, 1980.

---

Professional Experience

• 7/2005- 12/2006 (Founder and Chief Executive Officer)
  1/2007-present (Founder and Chief Scientist)
  moka5, Inc.
   
• 9/2000- present
  Professor of Computer Science,
  Professor of Electrical Engineering (by courtesy),
  Stanford University
   
• 1998
  Chief Scientist,
  Tensilica, Inc.
   
• 9/1995- 8/2000
  Associate Professor of Computer Science,
  Associate Professor of Electrical Engineering (by courtesy),
  Stanford University
   
• 9/1988 - 8/1995
  Assistant Professor of Computer Science,
  Assistant Professor of Electrical Engineering (by courtesy),
  Stanford University
   
• 9/1987 - 8/1988
  Research Associate, Computer Science,
  Carnegie Mellon University

---

Honors and Awards

• ACM Fellow, 2007.
• ACM Programing Language Design and Implementation Best Paper Award, ACM, 2004.
• "A Data Locality Optimizing Algorithms" (1991) included in the 20 Years of PLDI--A Selection (1979-1999), ACM, 2004.
• "Software Pipelining: An Effective Scheduling Technique for VLIW Machines" (1988) included in the 20 Years of PLDI--A Selection (1979-1999), ACM, 2004.
• ACM SIGSOFT Distinguished Paper Award, 2002.
• ACM Most Influential Programming Language Design and Implementation Paper Award, 2001.
• "Warp Architecture and Implementation" included in the 25 Years of the International Symposium of Computer Architecture (Selected Papers), ACM, 1998.
• Robert N. Noyce Faculty Scholar, School of Engineering, Stanford University, 1995-1996.
• NSF Young Investigator Award, 1992.

---

Public Service

• Study Committee Member, Sustaining Growth in Computer Performance, National Academy of Sciences, 2007-2008.
• Advisory Committee, Institute of Information Science, Academia Sinica, Taiwan, 2004-now.
• Member, Information Science and Technology Study (ISAT), Defense Advanced Research Projects Agency, 1999-2001.
• Editor, ACM Transactions on Computer Systems, ACM Press, 1994-2001.
• Editor, International Journal of Supercomputer Applications, MIT Press.
• Program Chair, ACM SIGPLAN 2000 Conference on Programming Language Design and Implementation (PLDI), 2000.
• Program Co-Chair, Hot Chips Symposium, 1999.
• Program Chair, First SUIF Compiler Workshop, 1996.
• Member, Program Committee, ACM Internatonal Conference on Virtual Execution Environments (VEE), 2008.
• Member, Program Committee, International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2004, 1994, 1991.
• Member, Program Committee, Symposium of Operating System Principles (SOSP), 2001.
• Member, Program Committee, Hot Chips Symposium, 2000, 1998, 1997.
• Member, Program Committee, International Symposium on Computer Architecture (ISCA), 1997, 1995.
• Member, Program Committee, 7^th International Workshop on Network and Operating System Support for Digital Audio and Video, NOSSDAV '97.
• Member, Program Committee, ACM Conference on Programming Language Design and Implementation (PLDI), 1996.
• Member, Program Committee, IEEE/ACM International Symposium on Microarchitecture (Micro), 1995.
• Member, Program Committee, ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP), 1995, 1993.
• Member, Program Committee, International Conference on Parallel Architectures and Compilation Techniques (PACT), 1994.
• Member, Program Committee, International Conference on Compiler Construction, 1994.
• Member, Program Committee, Supercomputing, 1993.
• Member, Program Committee, ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), 1993.
• Member, Program Committee, International Conference on Application-Specific Array Processors, 1992.
• Member, Program Committee, ACM Symposium on Parallel Algorithms and Architectures (SPAA), 1992.
• Member, Program Committee, Conference on Advanced Research in VLSI and Parallel Systems, 1992.
• Member, Program Committee, 24^th Annual Workshop on Microprogramming, 1991.

Invited Talks

1. Keynote Address, "Securing Web Applications Using Static and Dynamic Information Flow Tracking",
   ACM Sigplan 2008 Workshop on Partial Evaluation and Program Manipulation, January 2008.
2. Cray Distinguished Lecture, "Desktop Virtualization: From Research to Product",
   University of Minnesota, February 2008.
3. William Mong Distinguished Lecture, "LivePCs: Consumerizing PCs, from Research to Product",
   Hong Kong University, December 2007.
4. Distinguished Lecture, "Consumerizing PCs: from Research to Product",
   North Carolina State University, April 2007.
5. Distinguished Lecture, "Consumerizing PCs: from Research to Product",
   Northwestern University, April 2007.
6. Invited Talk, "Why Use Datalog to Analyze Program?",
   Twenty Second International Conference on Logic Programming, Seattle, August 17-20, 2006.
7. Tutorial, "Context-Sensitive Program Analysis as Database Queries",
   The 24th SIGMOD-SIGACT-SIGART Symposium on Principles of Database Systems, June, 2005.
8. Bruce Nelson Distinguished Lecture, "Software Design Rules",
   Harvey Mudd College, December 2004.
9. Keynote Address, "PCs for Mere Mortals",
   The 13th High-Performance Distributed Computing Computing, June 2004.
10. Keynote Address, "Challenges and New Approaches to Program Analysis",
    International Conference on Parallel Architectures and Compilation Techniques (PACT), October, 2003.
11. Dertouzos Lecture, "Converting Cycles into Ease-of-Use and Robustness",
    MIT, February 2003.
12. Distinguished Lecture, "Converting Cycles into Reliability",
    University of Illinois at Urbana-Champaign, December 2002.
13. Distinguished Lecture, "Converting Cycles into Reliability",
    Santa Clara University, December 2002.
14. Distinguished Lecture, "The Architecture of a Compute Utility",
    University of California at Davis, May 2001.
15. Invited Talk, "Compiler Technology for Configurable Processors",
    Enabling Technologies for System-on-Chip Development, Tampere, Finland, November 2000.
16. Invited Talk, "Infrastructure for Compilers",
    The University of Washington/Microsoft Research Summer Institute on Accelerating the Pace of Software Tools Research: Sharing Infrastructure, Seattle, WA, August 2000.
17. Keynote Address, "Beyond PCs and Workstations",
    Australasian Computer Science Week '99, Auckland, New Zealand, January 1999.
18. Invited Talk, "Compiler Technology for Application-Specific Processors/Systems on Chips",
    11th International Symposium on System Synthesis, Hsinchu, Taiwan, December 1998.
19. Keynote Address, "Maximizing Performance on Parallel Machines",
    Second International Symposium on Parallel Symbolic Computation, Maui, HI, July 1997.
20. Invited Speaker, 1997 SIAM Conference on Parallel Processing, Minneapolis, MN, March 1997.
21. Cray Distinguished Lecture, "The Stanford SUIF Parallelizing Compiler", University of Minnesota, March 1997.
22. Distinguished Lecture, "The Stanford SUIF Parallelizing Compiler", University of Utah, December 1996.
23. Invited Speaker, "RISC in 1995", IBM T. J. Watson's 50th Anniversary Research Symposium, White Plains, N. Y., November 1995.
24. Invited Speaker, "The Stanford SUIF Parallelizing Compiler",
    The Triangle Computer Science Distinguished Lecturer Series, Duke University, North Carolina, October 1995.
25. Invited Speaker, "The Stanford SUIF Parallelizing Compiler",
    1995 International Conference on Supercomputing, Barcelona, Spain, July 1995.
26. Keynote Address, CONPAR 94/VAPP VI International Conference on Parallel and Vector Processing, Linz, Austria, September 1994.
27. Invited Speaker, Scalable High Performance Computing Conference, Knoxville, TN, May 1994.
28. Invited Speaker, POPL '94: 21st ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, Portland, OR, January 1994.
29. Keynote Address, Workshop on Languages and Compiler Issues for Distributed Memory Machines, IBM CASCON '93, Toronto, Ontario, Canada, October 1993.
30. Tutorial Speaker, SIGPLAN '93 Conference on Programming Language Design and Implementation, Albuquerque, NM, June 1993.
31. Panel Speaker, Fourth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, San Diego, CA, May 1993.
32. Invited Speaker, IFIP Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism, Orlando, FL, January 1993.
33. Invited Speaker, DARPA Fellows Workshop, Minneapolis, MN, November 1992.
34. Tutorial Speaker, SIGPLAN '92 Conference on Programming Language Design and Implementation, San Francisco, CA, June 1992.
35. Panel Speaker, IBM CASCON '91, Toronto, Ontario, Canada, October 1991.
36. Invited Speaker, Argonne National Laboratory Summer Institute in Parallel Computing, Argonne, IL, September 1991.
37. Panel Speaker, Hot Chips Symposium, Palo Alto, CA, August 1991.
38. Invited Speaker, IBM Europe Institute on RISC Architectures in Scientific Computing, Austria, July 1991.
39. Invited Speaker, Microprocessor Forum Annual Meeting, San Francisco, CA, October 1990.
40. Invited Speaker, Ninth International Conference on Computing Methods in Applied Sciences and Engineering, Paris, France, January 1990, SIAM.

---

Ph.D. Graduates

1. Michael Wolf, CS, August 1992.
   Thesis: "Improving Parallelism and Locality in Nested Loops".
   Nominated by Stanford for the ACM Thesis Award.
    
2. Michael Smith, EE, November 1992.
   Current Position: Dean of Faculty of Arts and Science at Harvard University.
   Thesis: "Support for Speculative Execution in High-Performance Processors".
    
3. Todd Mowry, EE, March 1994.
   Current Position: Associate Professor of Computer Science at Carnegie Mellon University.
   Thesis: "Tolerating Latency Through Software-Controlled Data Prefetching".
   Arthur Samuel Thesis Award, 1994.
   Nominated by Stanford for the ACM Thesis Award.
    
4. Martin Rinard, CS, August 1994.
   Current Position: Professor of Electrical Engineering and Computer Science at MIT.
   Thesis: "The Design, Implementation, and Evaluation of Jade, a Portable, Implicitly Parallel Programming Language".
    
5. Daniel Scales, CS, December 1995.
   Current Position: Member of Technical Staff, VMWare, Inc., Palo Alto.
   Thesis: "Efficient Shared Objects for Distributed Address Space Machines".
    
6. Saman Amarasinghe, EE, January 1997.
   Current Position: Associate Professor of Electrical Engineering and Computer Science at MIT.
   Thesis: "Parallelizing Compiler Techniques Based on Linear Inequalities".
   Arthur Samuel Thesis Award, 1997.
   Nominated by Stanford for the ACM Thesis Award.
    
7. Jennifer Anderson, CS, March 1997.
   Current Position: Member of Technical Staff, VMWare, Inc., Palo Alto.
   Thesis: "Automatic Computation and Data Decomposition for Multiprocessors".
    
8. Robert Wilson, EE, December 1997.
   Current Position: Member of Technical Staff, Tensilica, Inc., Santa Clara.
   Thesis: "Efficient Context-Sensitive Pointer Analysis for C Programs".
    
9. Jason Nieh, EE, December 1998.
   Current Position: Associate Professor of Computer Science at Columbia University.
   Thesis: "The Design Implementation and Evaluation of SMART: A Scheduler for Multimedia Applications".
    
10. Shih-wei Liao, EE, August 2000.
    Current Position: Member of Technical Staff, Intel Research.
    Thesis: "SUIF Explorer: an Interactive and Interprocedural Parallelizer".
     
11. Brian Schmidt, CS, August 2000.
    Current Position: Member of Technical Staff, Silicon Image.
    Thesis: "Supporting Ubiquitous Computing with Stateless Consoles and Computation Caches".
     
12. Patrick Sathyanathan, CS, June 2001.
    Thesis: "Interprocedural Data Flow Analysis--Alias Analysis".
     
13. Amy Lim, CS, September 2001.
    Current Position: Member of Technical Staff, Cadence.
    Thesis: "Improving Parallelism And Data Locality With Affine Partitioning".
     
14. Brian Murphy, CS, December 2001.
    Current Position: Member of Technical Staff, Intel Research,
    Thesis: "Frameworks for Precise Program Analysis".
     
15. Jeffrey Oplinger, EE, September 2004.
    Current Position: Member of Technical Staff, Sun Microsystems,
    Thesis: "Enhancing Software Reliability with Speculative Threads".
     
16. David Heine, EE, December 2004.
    Current Position: Member of Technical Staff, Tensilica,
    Thesis: "Static Memory Leak Detection".
     
17. Constantine Sapuntzakis, CS, December 2006.
    Current Position: Founder and Principal Engineer, moka5.
    Thesis: "The Collective: Simplifying the Management and Mobility of Today's Computers"
     
18. Benjamin Livshits, CS, December 2006.
    Current Position: Researcher, Microsoft Research.
    Thesis: "Improving Software security with Precise Static and Runtime Analysis"
     
19. John Whaley, CS, March 2007.
    Current Position: Founder and Principal Engineer, moka5.
    Thesis: "Context-Sensitive Pointer Analysis Using Binary Decision Diagrams"
    Arthur Samuel Thesis Award, 2007.
    Nominated by Stanford for the ACM Thesis Award.

---

Released Software Systems

• Aigner G., Diwan, A., Heine, D. L., Lam, M.S., Moore, D. L., Murphy, B. R. and Sapuntzakis, C. The SUIF2 Compiler Infrastructure, November 1999.
• Wilson, R. P., French, R. S., Wilson, C. S., Amarasinghe, S. P., Anderson, J. M., Tjiang, S. W. K., Liao, S. W., Tseng, C. W., Hall, M. W., Lam, M. S. and Hennessy, J. L., SUIF (Stanford University Intermediate Format) Compiler System: an Infrastructure for Research on Parallelizing and Optimizing Compilers, May 1994.
• Scales, D. J. and Lam, M. S., SAM: a Memory System for Distributed Memory Machines, March 1994.
• Rinard, M. C., Scales, D. J. and Lam, M. S., Jade: a High-Level Language for Coarse-Grain Parallelism, June 1993.

---

Publications

Refereed Journal Articles

1. Hall, M. W., Amarasinghe, S. P., Murphy, B. R., Liao, S.-W. and Lam, M. S., Interprocedural Parallelization Analysis in SUIF, ACM Transactions on Programming Languages and Systems, July 2005, 27(4), pp. 662-731.
2. Nieh, J. and Lam, M. S. A SMART scheduler for multimedia applications. ACM Transactions on Computer Systems, May 2003, 21(2), pp. 117-163.
3. Rinard, M. C. and Lam, M. S. The Design, Implementation and Evaluation of Jade. ACM Transactions on Programming Languages and Systems, May 1998, 20(3), pp. 483-545.
4. Lim, A. and Lam, M. S., Maximizing Parallelism and Minimizing Synchronization with Affine Partitions. Parallel Computing, May 1998, 24(3-4): pp. 445-476.
5. Hall, M. W., Anderson, J. M., Amarasinghe, S. P., Murphy, B. R., Liao, S.-W., Bugnion, E. and Lam, M. S., Maximizing Multiprocessor Performance with the SUIF Compiler, IEEE Computer, December 1996, 29, 12. (A special issue on multiprocessors).
6. Amarasinghe, S.P., Anderson, J. M., Wilson, C. S. , Liao, S.-W., Murphy, B. R., French, R. S., Lam, M. S. and Hall, M. W., Multiprocessors from a Software Perspective, IEEE Micro, June 1996. (A special issue on the Hot Chips VII Conference, Stanford, CA, 13-15 August 1995).
7. Torrellas, J. and Lam, M. S. and Hennessy, J. L., False Sharing and Spatial Locality in Multiprocessor Caches, IEEE Transactions on Computers, June 1994, 43, 6, pp. 651-663.
8. Rinard, M. C., Scales, D. J., and Lam, M. S., Jade: A High-Level, Machine-Independent Language for Parallel Programming, IEEE Computer, June 1993, 26, 6, pp. 28 - 38.
9. Lenoski, D., Laudon, J., Gharachorloo, K., Weber, W. D., Gupta, A., Hennessy, J., Horowitz, M., and Lam, M. The Stanford DASH Multiprocessor. IEEE Computer, March 1992, 25, 3, pp. 63-79.
10. Wolf, M. E., and Lam, M. S., A Loop Transformation Theory and Algorithm to Maximize Parallelism, IEEE Transactions on Parallel and Distributed Systems, October 1991, 2, 4, pp. 452-471.
11. Lam, M. Instruction Scheduling for Superscalar Architectures. Annual Review of Computer Science, 4. Annual Reviews, 1990, pp. 173-201.
12. Annaratone, M., Arnould, E., Gross, T., Kung, H. T., Lam, M., and Menzilcioglu, O. The Warp Computer: Architecture, Implementation and Performance. IEEE Transactions on Computers, December 1987, C-36, 12, pp. 1523-1538.
13. Kung, H. T., and Lam, M. Wafer-Scale Integration and Two-Level Pipelined Implementations of Systolic Arrays. Journal of Parallel and Distributed Computing, 1984, 1, 1, pp. 32-63.
14. Lam, M., and Mostow, J. A Transformational Model of VLSI Systolic Design. IEEE Computer, May 1985, 18, 2, pp. 45-52. An earlier version appears in the Proceedings of the 6^th International Symposium on Computer Hardware and Description Languages and their Applications, (Pittsburgh, PA, 23-25 May 1983). North Holland, 1983, pp. 65-78.

Refereed Conference Proceedings

15. Unkel, C., Lam, M. S. Automatic Inference of Stationary Fields: a Generalization of Java's Final Fields. In Proceedings of the 35^th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, (San Francisco, CA, 10-12 January 2008). ACM, 2008.
16. Heine, D., Lam, M. S. Static Detection of Leaks in Polymorphic Containers. In Proceeding of the 28th International Conference on Software Engineering, (Shanghai, China, 20-28 May, 2006), pages 252-261.
17. Whaley, J., Avots, D., Carbin, M., Lam, M. S. Using Datalog with Binary Decision Diagrams for Program Analysis. In Proceedings of Programming Languages and Systems: Third Asian Symposium, (APLAS '05), (Tsukuba, Japan, 3-5 November, 2005), pages 97-118.
18. Livshits, B., Whaley, J. and Lam, M. S. Reflection Analysis for Java. In Proceedings of the Third Asian Symposium on Programming Languages and Systems (APLAS '05), (Tsukuba, Japan, 3-5 November, 2005), pages 139-160.
19. Martin, M., Livshits, V. B., and Lam, M. S. Finding Application Errors using PQL: a Program Query Language. In Proceedings of the Conference on Object-Oriented Programming, Systems, Languages and Applications (OOPSLA '05), (San Diego, CA, 16-20 October, 2005), pages 365-383.
20. Livshits, V. B., and Lam, M. S. Finding Security Vulnerabilities in Java Applications Using Static Analysis. In Proceedings of the 14th USENIX Security Symposium, (Baltimore, MD, 3-5 August, 2005), pages 271-286.
21. Avots, D., Dalton, M., Livshits, V. B., and Lam, M. S. Improving Software Security with A C Pointer Alias Analysis. In Proceedings of the 27th International Conference on Software Engineering, (St. Louis, Missouri, 18-20 May, 2005), pages 332-341.
22. Chandra, R., Zeldovich, N., Sapuntzakis, C. P., and Lam, M. S. The Collective: A Cache-Based System Management Architecture. In Proceedings of the Second Symposium on Networked Systems Design and Implementation, (Boston, MA, 2-4 May, 2005).
23. Whaley, J. and Lam, M. S. Cloning-Based Context-Sensitive Pointer Alias Analysis Using Binary Decision Diagrams. In Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation, (Washington, D. C., 9-11 June, 2004), pages 131-144. Best paper award.
24. Ruwase, O. and Lam, M. S. A Practical Dynamic Buffer Overflow Detector. In Proceedings of the 11th Annual Network and Distributed System Security Symposium, (San Diego, CA, 5-6 February, 2004), pages 159-169.
25. Sapuntzakis, C., Brumley, D., Chandra, R., Zeldovich, N. and Chow, J., Lam, M. S. and Rosenblum, M. Virtual Appliances for Deploying and Maintaining Software In Proceedings of the 17th Large Installation Systems Administration Conference (LISA '03), (San Diego, CA, 26-31 October, 2003), pages 181-194.
26. Livshits, V. B. and Lam, M. S., Tracking Pointers with Path and Context Sensitivity for Bug Detection in C Programs, In Proceedings of the 11th ACM SIGSOFT International Symposium on the Foundations of Software Engineering (FSE-11), (Helsinki, Finland, 3-5 September, 2003), pages 317-326.
27. Heine, D. L. and Lam, M. S., A Practical Flow-Sensitive and Context-Sensitive C and C++ Memory Leak Detector In Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation (San Diego, CA, 9-11 June, 2003), pages 168-181.
28. Sapuntzakis, C. P. and Lam, M. S., Virtual Appliances in the Collective: A Road to Hassle-free Computing In Proceedings of the Ninth Workshop on Hot Topics in Operating Systems (Lihue, HI, 18-21 May, 2003), Pages 55-60.
29. Sapuntzakis, C. P., Chandra, R., Pfaff, B., Chow, J., Lam, M. S. and Rosenblum, M. Optimizing the Migration of Virtual Computers, In Proceedings of the Fifth Symposium on Operating Systems Design and Implementation (Boston, MA, 9-11 December, 2002), Pages 377-390.
30. Oplinger, J. and Lam, M. S., Enhancing Software Reliability using Speculative Threads, In Proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems, (San Jose, CA, 7-9 October, 2002), Pages 218-228.
    
31. Whaley, J. and Lam, M. S., An Efficient Inclusion-Based Points-To Analysis for Strictly-Typed Languages, In Proceedings of the 9th International Static Analysis Symposium, (Madrid, Spain, 17-20 September, 2002), Pages 180-195.
    
32. Whaley, J., Martin, M. C. and Lam, M. S., Automatic Extraction of Object-Oriented Component Interfaces, In Proceedings of the International Symposium on Software Testing and Analysis, (Rome, Italy, 22-24 July, 2002), Pages 218-228. ACM SIGSOFT distinguished paper award.
33. Hangal, S. and Lam, M. S., Tracking Down Software Bugs Using Automatic Anomaly Detection, In Proceedings of the International Conference on Software Engineering, (Orlando, Florida, 22-24 May, 2002), Pages 291-301.
34. Lim, A. W., Liao, S.-W. and Lam, M. S., Blocking and Array Contraction Across Arbitrarily Nested Loops Using Affine Partitioning, In Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, (Salt Lake City, UT, 18-19 June, 2001). ACM, 2001.
35. Murphy B. R. and Lam, M. S., Program Analysis with Partial Transfer Functions, In Proceedings of the 2000 ACM SIGPLAN Workshop on Partial Evaluation and Semantics-Based Program Manipulation, (Boston, MA, 22-23 January, 2000). Pages 94-103. ACM, 2000.
36. Schmidt, B., Lam, M. S. and Northcutt, J. D., The Interactive Performance of SLIM: a Stateless, Thin-Client Architecture, In Proceedings of the 17^th Annual ACM Symposium on Operating Systems Principles, (Kiawah Island Resort, SC, 12-15 December 1999). ACM, 1999.
37. Oplinger, J. T., Heine, D. L. and Lam, M. S., In Search of Speculative Thread-Level Parallelism, In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, (Newport Beach, CA, 12-16 October 1999). IEEE, 1999.
38. Lim, A. W. , Cheong G. I. and Lam, M. S. An Affine Partitioning Algorithm to Maximize Parallelism and Minimize Communication, In Proceedings of the 13th ACM SIGARCH International Conference on Supercomputing, (Rhodes, Greece, 20-25 June, 1999). ACM, 1999.
39. Liao S.-W, Diwan A., Bosch, R. P. Jr., Ghuloum, A. and Lam, M. S. SUIF Explorer: An Interactive and Interprocedural Parallelizer, In Proceedings of the 7th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, (Atlanta GA, 4-6 May, 1999). ACM, 1999.
40. Nieh, J. and Lam, M. S., Multimedia on Multiprocessors: Where's the OS When You Really Need it, In Proceedings of the Eighth International Workshop on Network and Operating System Support for Digital Audio and Video,(Cambridge, U.K., July 1998).
41. Nieh, J. and Lam, M. S., The Design, Implementation and Evaluation of SMART: a Scheduler for Multimedia Applications, In Proceedings of the 16^th Annual ACM Symposium on Operating Systems Principles, (St. Malo, France, 6-8 October 1997). ACM, 1997.
42. Nieh, J. and Lam M. S., SMART UNIX SV4 Support for Multimedia Applications, in Proceedings of IEEE International Conference on Multimedia Computing and Systems, (Ottawa, Ontario, Canada, June 1997). IEEE, 1997.
43. Lim, A. W. and Lam, M. S., Maximizing Parallelism and Minimizing Synchronization with Affine Transforms, In Proceedings of the 24^th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, (Paris, France, 15-17 January 1997). ACM, 1997.
44. Bugnion, E., Anderson, J. M., Mowry, T. C., Rosenblum, M. and Lam, M. S., Compiler-Directed Page Coloring for Multiprocessors, In Proceedings of the Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, (Boston, MA, 2-4 October 1996).
45. Scales, D. J. and Lam, M. S., Transparent Fault Tolerance for Parallel Applications on Networks of Workstations, In Proceedings of the USENIX 1996 Technical Conference on UNIX and Advanced Computing Systems, (San Diego, CA, 22-26 January 1996). USENIX, 1996.
46. Hall, M. W., Amarasinghe, S. P., Murphy, B. R., Liao, S.-W. and Lam, M. S., Detecting Coarse-Grain Parallelism Using an Interprocedural Parallelizing Compiler, In Proceedings of Supercomputing '95, (San Diego, CA, 4-8 December 1995). ACM, 1995.
47. Anderson, J. M., Amarasinghe, S. P. and Lam, M. S., Data and Computation Transformations for Multiprocessors, In Proceedings of the Fifth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, [Santa Barbara, CA, 19-21 July 1995]. ACM, 1995, pp. 166-178.
48. Tseng, C. W., Anderson, J. M., Amarasinghe, S. P. and Lam, M. S., Unified Compilation Techniques for Shared and Distributed Address Space Machines, In Proceedings of the 1995 International Conference on Supercomputing, [Barcelona, Spain, 3-7 July 1995]. ACM, 1995, pp. 67-76.
49. Wilson, R. P. and Lam, M. S., Efficient Context-Sensitive Pointer Analysis for C Programs, In Proceedings of the ACM SIGPLAN '95 Conference on Programming Language Design and Implementation, [La Jolla, CA, 19-21 June 1995]. ACM, 1995, pp. 1-12.
50. French, R. S., Lam, M. S., Levitt, J. R. and Olukotun, K., A General Method for Compiling Event-Driven Simulations, In Proceedings of the 32^nd ACM/IEEE Design Automation Conference, [San Francisco, CA, 12-16 June 1995].
51. Schmidt, B. K., Northcutt, J. D. and Lam, M. S., A Method and Apparatus for Measuring Media Synchronization, In Proceedings of the 5^th International Workshop on Network and Operating System Support for Digital Audio and Video, [Durham, NH, 19-21 April 1995].
52. Nieh, J. and Lam, M. S., Integrated Processor Scheduling for Multimedia, In Proceedings of the 5^th International Workshop on Network and Operating System Support for Digital Audio and Video, [Durham, NH, 19-21 April 1995].
53. Scales, D. J. and Lam, M. S., The Design and Evaluation of a Shared Object System for Distributed Memory Machines, In Proceedings of the First Symposium on Operating Systems Design and Implementation, (Monterey, CA, 14-17 November 1994).
54. Anderson, J. M. and Lam, M. S., Global Optimizations for Parallelism and Locality on Scalable Parallel Machines, In Proceedings of the SIGPLAN '93 Conference on Programming Language Design and Implementation, (Albuquerque, NM, 23-25 June 1993). SIGPLAN Notices, June 1993, 28, 6, pp. 112-125.
55. Amarasinghe, S. P. and Lam, M. S., Communication Optimization and Code Generation for Distributed Memory Machines, In Proceedings of the SIGPLAN '93 Conference on Programming Language Design and Implementation, (Albuquerque, NM, 23-25 June 1993). SIGPLAN Notices, June 1993, 28, 6, pp. 126-138.
56. Maydan, D. R., Amarasinghe, S. P., and Lam, M. S., Array Data Flow Analysis and its Use in Array Privatization, In Proceedings of the 20^th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, (Charleston, SC, 10-13 January 1993). ACM, 1993, pp. 1-14.
57. Rinard, M. C., Scales, D. J., and Lam, M. S., Heterogeneous Parallel Programming in Jade, In Proceedings of Supercomputing '92, (Minneapolis, MN, 16-20 November 1992). IEEE Computer Society Press, 1992, pp. 245-256.
58. Smith, M. D., Horowitz, M. A. and Lam, M. S., Efficient Superscalar Performance Through Boosting, In Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, (Boston, MA, 12-15 October 1992). SIGPLAN Notices, October 1992, 27, 9, pp. 62-75.
59. Mowry, T. C., Lam, M. S. and Gupta, A., Design and Evaluation of a Compiler Algorithm for Prefetching, In Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, (Boston, MA, 12-15 October 1992). SIGPLAN Notices, October 1992, 27, 9, pp. 248-261.
60. Lam, M. S. and Wilson, R. P., Limits of Control Flow on Parallelism, In Proceedings of the 19^th Annual ACM Symposium on Computer Architecture, (Gold Coast, Queensland, Australia, 19-21 May 1992). Computer Architecture News, May 1992, 20, 2, pp. 46-57.
61. Rinard, M. C., and Lam, M. S. Semantic Foundations of Jade, In Proceedings of the 19^th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, (Albuquerque NM, 19-22 January 1992). ACM, 1992, pp. 105-118.
62. Maydan, D. E., Hennessy, J. L., and Lam, M. S. Efficient and Exact Data Dependence Analysis. In Proceedings of the SIGPLAN '91 Conference on Programming Language Design and Implementation, (Toronto Ontario, Canada, 26-28 June 1991). SIGPLAN Notices, June 1991, 26, 6, pp. 1-14.
63. Wolf, M. E., and Lam, M. S. A Data Locality Optimizing Algorithm. In Proceedings of the SIGPLAN '91 Conference on Programming Language Design and Implementation, (Toronto Ontario, Canada, 26-28 June 1991). SIGPLAN Notices, June 1991, 26, 6, pp. 30-44. ACM Most Influential PLDI Paper Award, 2001. Included in the 20 Years of PLDI 20 Years of PLDI (1979-1999): A Selection, 2004.
64. Lam, M. S., and Rinard, M. C. Coarse-Grain Parallel Programming in Jade. In Proceedings of the ACM SIGPLAN 3^rd Symposium on Principles and Practice of Parallel Programming (PPoPP '91), (Williamsburg, VA, 21-24 April 1991). ACM 1991, pp. 94-105.
65. Lam, M. S., Rothberg, E. E., and Wolf, M. E. The Cache Performance and Optimizations of Blocked Algorithms. In Proceedings of the 4^th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS IV), (Santa Clara, CA, 8-11 April 1991). SIGPLAN Notices, April 1991, 26, 1, pp. 63-74.
66. Lam, M. S., and Wolf, M. E. Automatic Blocking by a Compiler. In Proceedings of the 5^th SIAM Conference on Parallel Processing for Scientific Computing, (Houston, TX, 25-27 March 1991). SIAM, 1992, pp. 537-542.
67. Torrellas, J., Lam, M., and Hennessy, J. L. Simple Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates. In Proceedings of the International Conference on Parallel Processing, (Pennsylvania State University, August 1990), Vol. 2, pp. 266-270.
68. Borkar, S., Cohn, R., Cox, G., Gross, T., Kung, H. T., Lam, M., Levine, M., Moore, B., Moore, W., Peterson, C., Susman, J., Sutton, J., Urbanski, J., and Webb, J. Supporting Systolic and Memory Communication in iWarp. In Proceedings of the 17^th Annual International Symposium on Computer Architecture, (Seattle, WA, 28-31 May 1990). Computer Architecture News, May 1990, 18, 2, pp. 70-81.
69. Smith, M. D., Lam, M. S., and Horowitz, M. A. Boosting Beyond Static Scheduling in a Superscalar Processor. In Proceedings of the 17^th Annual International Symposium on Computer Architecture, (Seattle, WA, 28-31 May 1990). Computer Architecture News, May 1990, 18, 2, pp. 344-354.
70. Lenoski, D., Gharachorloo, K., Laudon, J., Gupta, A., Hennessy, J., Horowitz, M., and Lam, M. Design of Scalable Shared-Memory Multiprocessors: The DASH Approach. In Proceedings of the Compcon Spring '90: 35^th IEEE Computer Society International Conference, (San Francisco, CA, 26 February - 2 March 1990). IEEE Computer Society, 1990, pp. 62-67.
71. Cohn, R., Gross, T., Lam, M., and Tseng, P. S. Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor. In Proceedings of the 3^rd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS III), (Boston, MA, 3-6 April 1989). ACM, 1989, pp. 2-14.
72. Borkar, S., Cohn, R., Cox, G., Gleason, S., Gross, T., Kung, H. T., Lam, M., Moore, B., Peterson, C., Pieper, J., Rankin, L., Tseng, P. S., Sutton, J., Urbanski, J., and Webb, J. iWarp: An Integrated Solution to High-Speed Parallel Computing. In Proceedings of Supercomputing '88, (Orlando, FL, 14-18 November 1988). IEEE Computer Society Press, 1988, pp. 330-339.
73. Lam, M. Software Pipelining: An Effective Scheduling Technique for VLIW Machines, In Proceedings of the SIGPLAN '88 Conference on Programming Language Design and Implementation, (Atlanta, GA, 22 24 June 1988). SIGPLAN Notices, June 1988, 23, 7, pp. 318-328. Included in the 20 Years of PLDI 20 Years of PLDI (1979-1999): A Selection, 2004.
74. Lam, M. Compiler Optimizations for Asynchronous Systolic Array Programs. In Proceedings of the 15^th Annual ACM Symposium on Principles of Programming Languages, (San Diego, CA, 13-15 January 1988). ACM, 1988, pp. 309-318.
75. Kung, H. T., and Lam, M. An Approach to Automatic Generation of Linear Systolic Array Programs. In Proceedings of the International Conference and Exhibition on Parallel Processing for Computer Vision and Display, (Leeds, UK, 12-15 January 1988). Addison-Wesley, 1989, pp. 3-15.
76. Annaratone, M., Arnould, E., Cohn, R., Gross, T., Kung, H. T., Lam, M., Menzilcioglu, O, Sarocky, K., Senko, J., and Webb, J. Warp Architecture: From Prototype to Production. In Proceedings of the 1987 National Computer Conference, (Chicago, IL, 15-18 June 1987). AFIPS Press, 1987, pp. 133-140.
77. Bruegge, B., Chang, C., Cohn, R., Gross, T., Lam, M., Lieu, P., Noaman, A., and Yam, D. The Warp Programming Environment. In Proceedings of the AFIPS 1987 National Computer Conference, (Chicago, IL, 15-18 June 1987). AFIPS Press, 1987, pp. 141-148.
78. Bruegge, B., Chang, C., Cohn, R., Gross, T., Lam, M., Lieu, P., Noaman, A., and Yam, D. Programming Warp. In Proceedings of the IEEE Compcon Spring '87, (San Francisco, CA, February 1987). IEEE, 1987, pp. 268-271.
79. Annaratone, M., Arnould, E., Cohn, R., Gross, T., Lam, M., Lieu, P., Noaman, A., and Yam, D. Architecture of Warp. In Proceedings of the IEEE Compcon Spring '87, (San Francisco, CA, February 1987). IEEE, 1987, pp. 264-267.
80. Gross, T, and Lam, M. Compilation for a High-Performance Systolic Array. In Proceedings of the SIGPLAN '86 Symposium on Compiler Construction, (Palo Alto, CA, 25-27 June 1986). SIGPLAN Notices, June 1986, 21, 7, pp. 27-38.
81. Annaratone, M., Arnould, E., Gross, T., Kung, H. T., Lam, M., and Menzilcioglu, O. Warp Architecture and Implementation. In Proceedings of the 13^th Annual Symposium on Computer Architecture, (Tokyo, Japan, 2-5 June 1986). Computer Architecture News, June 1986, 14, 2, pp. 346-356.
Included in 25 Years of the International Symposia on Computer Architecture, 1998.
82. Gross, T., Kung, H. T., Lam, M., and Webb, J. Warp as a Machine for Low-Level Vision. In Proceedings of the IEEE International Conference on Robotics and Automation, (St. Louis, MO, March 1985). IEEE Computer Society Press, 1985, pp. 790-800.
83. Kung, H. T., and Lam, M. S. Fault-Tolerance and Two-Level Pipelining in VLSI Systolic Arrays. In Proceedings of the Conference on Advanced Research in VLSI, (Cambridge, MA, 23-25 January 1984), Artech, 1984, pp. 74-83.

Refereed Presentations at Meetings and Symposia

84. Amarasinghe, S.P., Anderson, J. M., French, R. S., Hall, M. W., Lam, M. S., Liao, S.-W., Murphy, B. R., Tseng, C.-W., Wilson, C. S. and Wilson, R. P., Hot Compilers for Future Hot Chips, In Hot Chips VII , (Stanford, CA, 13-15 August 1995).

Non-Refereed Books & Book Chapters

85. Aho, Alfred V., Lam, Monica S., Sethi, Ravi, and Ullman, Jeffrey D., Compilers: Principles, Techniques and Tools (2nd Ed), 2006.
86. Lam, M. S., A Retrospective: A Data Locality Optimizing Algorithm
    In 20 Years of PLDI (1979-1999): A Selection, 2004.
87. Lam, M. S., A Retrospective: Software Pipelining: An Effective Scheduling Technique for VLIW Machines.
    In 20 Years of PLDI (1979-1999): A Selection, 2004.
88. Lam, M. S., Current Status of the SUIF Research Project, In The Data Parallel Programming Model: Foundations, HPF Realization, and Scientific Applications Ed. G.-R. Perrin and A. Darte, Springer, 1996, pages 65-75. (Lecture notes Computer Science vol. 1132).
89. Wolf, M. E., and Lam, M. S. An Algorithmic Approach to Compound Loop Transformations. In Advances in Languages and Compilers for Parallel Processing. Ed. A. Nicolau, et al., MIT Press, 1991, pp. 243-259.
90. Lam, M. A Systolic Array Optimizing Compiler. Kluwer Academic Publishers, 1988.

Non-Refereed Conference Proceedings

91. Lam, M. S., Martin, M. C., Livshits, V. B., and Whaley J., Securing Web Applications Using Static and Dynamic Information Flow Tracking, In ACM Sigplan 2008 Workshop on Partial Evaluation and Program Manipulation, (Keynote address), January 2008.
92. Lam, M. S., Whaley J., Livshits, V. B., Martin, M. C., Avots, D., Carbin, M, and Unkel, C. Context-Sensitive Program Analysis as Database Queries. In Proceedings of the 24th SIGMOD-SIGACT-SIGART Symposium on Principles of Database Systems, (Maryland, Baltimore, June 13-15, 2005) (Invited Tutorial).
93. Lim, A. W. and Lam, M. S.  Cache Optimizations With Affine Partitioning, In Proceedings of the Tenth SIAM Conference on Parallel Processing for Scientific Computing, (Portsmouth, Virginia, March, 2001).
94. Sathyanathan, P. W. and Lam, M. S., Context-Sensitive Interprocedural Analysis in the Presence of Dynamic Aliasing, In Proceedings of Ninth Workshop on Languages and Compilers for Parallel Computing, (Santa Clara, CA, 8-10 August 1996).
95. Hall, M. W., Amarasinghe, S. P., Murphy, B. R., Liao, S.-W. and Lam, M. S., A Fully Interprocedural System for Automatic Parallelization, In Proceedings of Eighth Workshop on Languages and Compilers for Parallel Computing, (Columbus, Ohio, 10-12 August 1995).
96. Amarasinghe, S.P., Anderson, J. M., Lam, M. S., and Tseng, C.-W., An Overview of the SUIF Compiler for Scalable Parallel Machines. In Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, (San Francisco, CA, 15-17 February 1995), (Invited Paper).
97. Lam, M. S., Locality Optimizations for Parallel Machines, In Proceedings of the Third Joint International Conference on Vector and Parallel Processing, (Linz, Austria, 6-8 September 1994). Springer Verlag, 1994, pp. 17-28, (Keynote Address).
98. Lim, A. W., and Lam, M. S., Communication-Free Parallelization via Affine Transformations, In Proceedings of Seventh Workshop on Languages and Compilers for Parallel Computing, (Ithaca, NY, 8-10 August 1994).
99. Amarasinghe, S.P., Anderson, J. M., Lam, M. S. and Lim, A. W., An Overview of a Compiler for Scalable Parallel Machines, In Proceedings of the Sixth Workshop on Languages and Compilers for Parallel Computing, (Portland, OR, 12-14 August 1993). Springer-Verlag, 1994, pp. 253-272.
100. Maydan, D. E., Amarasinghe, S. and Lam, M. S., Data Dependence and Data-Flow Analysis of Arrays, In Proceedings of the Fifth Workshop on Languages and Compilers for Parallel Computing, (New Haven, CT, 3-5 August 1992.), Springer-Verlag, 1993, pp. 282-292.
101. Tjiang, S. W. K., Wolf, M. E., Lam, M. S., Pieper, K., Hennessy, J. L. Integrating Scalar Optimizations and Parallelization. In Proceedings of the Fourth Workshop on Languages and Compilers for Parallel Computing, (Santa Clara, CA, 7-9 August 1991), Springer-Verlag, 1992, pp. 137-151.
102. Scales, D. J., Rinard, M. C., Lam, M. S., Anderson, J. M. Hierarchical Concurrency in Jade. In Proceedings of the Fourth Workshop on Languages and Compilers for Parallel Computing, (Santa Clara, CA, 7-9 August 1991), Springer-Verlag, 1992, pp. 50-64.
103. Maydan, D. E., Hennessy, J. L. and Lam, M. S., "Effectiveness of Data Dependence Analysis", In Proceedings of the NSF-NCRD Workshop on Advanced Compilation Techniques for Novel Architectures" , (Israel, May 1991).
104. Lam, M. S., Compiler Optimizations for Superscalar Computers, In Proceedings of the Ninth International Conference on Computing Methods in Applied Sciences and Engineering, (Paris, France, 29 January - 2 February, 1990), SIAM., 1990, pp. 360-377, (Invited Paper).
105. Tseng, P. S., Lam, M., and Kung, H. T. The Domain Parallel Computation Model on Warp. In Proceedings of the SPIE-The International Society for Optical Engineering, (San Diego, CA, August 1988). Vol. 977, pp. 130-137.

Technical Reports

106. Schmidt, B. K. and Lam, M. S., A Compiler for Creating Evolutionary Software and Application Experience, Technical Report CSL-TR-99-782, Stanford University, April 1999.
107. Nieh, J. and Lam, M. S., The Design, Implementation and Evaluation of SMART: a Scheduler for Multimedia Applications, Technical Report CSL-TR-97-721, Stanford University, April 1997.
108. Oplinger, J., Heine, D., Liao, S.-W., Nayfeh, B. A., Lam, M. S. and Olukotun, K., Software and Hardware for Exploiting Speculative Parallelism with a Multiprocessor, Technical Report CSL-TR-97-715, Stanford University, February 1997.
109. Wilson, R. P., French, R. S., Wilson, C. S., Amarasinghe, S. P., Anderson, J. M., Tjiang, S. W. K., Liao, S. W., Tseng, C. W., Hall, M. W., Lam, M. S. and Hennessy, J. L., SUIF: A Parallelizing and Optimizing Research Compiler, Technical Report CSL-TR-94-620, Stanford University, May 1994. ACM SIGPLAN Notices, 29 (1994) 31-37.
110. Scales, D. J. and Lam, M. S., An Efficient Shared Memory System for Distributed Memory Machines, Technical Report CSL-TR-94-627, Stanford University, July 1994.
111. Lenoski, D., Gharachorloo, K., Laudon, J., Gupta, A., Hennessy, J., Horowitz, M. and Lam, M., Design of the Stanford DASH Multiprocessor. Technical Report CSL-TR-89-403, Stanford University, December 1989.
112. Lam, M. A Systolic Array Optimizing Compiler. Ph.D. Thesis, Carnegie-Mellon University, May 1987, 138 pages.